Architecture Description Graph

The Architecture Description Graph describes the underlying CGRA hardware capabilities. It is a directive graph between different hardware nodes.

The ADG is generated by both the chipyard generator and as a result of the Design Space Explorer (DSE). The ADG also serves as an input into both the DSE and Chipyard generator, to create better hardware designs and simulate capabilites. The scheduler schedules DFG graphs onto the ADG.

• ADG File Format
• ADG Visualization
• ADG File Example